Workshop-Programm

8:45 - 9:00 Uhr

Begrüßung

9:00 - 10:00 Uhr

Keynote

More Compute Performance under the Hood: New Applications and Complexity Challenges for Automotive Microcontrollers

Christian Pacha

Senior Principal, Head SoC Architecture, Infineon, Germany

10:15 - 11:15 Uhr

Session 1: Application of new test standards

Test Scheduling Optimization Model for IEEE 1687 Multi-Power Domain Networks Using Boolean Satisfiability

Payan Habiby

University of Bremen, Germany

Sebastian Huhn

University of Bremen and Cyber-Physical Systems, DFKI GmbH

Rolf Drechsler

University of Bremen and Cyber-Physical Systems, DFKI GmbH

Testing 3D stacks - IEEE 1838

Michael Günter Wahl

University of Siegen, Germany

Pause

11:30 - 12:30 Uhr

Session 2: Analog Mixed-Signal Test

Terminalsystem 2.0: Neue flexible Möglichkeiten der Kombination von PXI-Testerressourcen bis 1 GHz

Björn Bieske

IMMS GmbH, Germany

Ludwig Kircher

TU Ilmenau

Alexander Rolapp

IMMS GmbH, Germany

Novell UWB-Sub-Nanosecond Pulse Modulation Concept

Alexander Stephan Oleszczuk

eesy-IC GmbH, Germany

Robert Weigel

Friedrich-Alexander-Universität Erlangen, Germany

Pause

13:30 - 15:00 Uhr

Session 3: Safety

Scalable Implementation of Functional Path Ring Oscillator for MCU Performance Screening

Tobias Kilian

Infineon Technologies AG and Technical University of Munich, Germany

Heiko Ahrens

Infineon Technologies AG, Neubiberg, Germany

Daniel Tille

Infineon Technologies AG, Neubiberg, Germany

Martin Huch

Infineon Technologies AG, Neubiberg, Germany

Ulf Schlichtmann

Technical University of Munich, Germany

Towards an Automated Flow for Implementation of Dedicated LBIST Scan Chains for Functional Safety

Alessio Ciarciá

Infineon Technologies, Germany and Politecnico di Torino, Torino, Italy

Daniel Tille

Infineon Technologies, Munich, Germany

Paolo Bernardi

Politecnico di Torino, Torino, Italy

Efficient Post-Silicon Run-Time Error Detection for Systems-on-Chip

Sebastian Pointner

Institute for Integrated Circuits, Johannes Kepler University Linz, Austria

Martin Brunner

Infineon Technologies Linz, Austria

Rainer Findenig

Infineon Technologies Linz, Austria

Robert Wille

Institute for Integrated Circuits, Johannes Kepler University Linz, Austria

Pause

15:15 - 16:45 Uhr

Special Session: Results from the RESCUE-Project

RESCUE ITN: Challenges of Integrating Reliability, Security and Quality in Nanoelectronic Systems

Maksim Jenihhin

Tallinn University of Technology

Run-time Management of Hardware Redundancy for Mixed-Critical Applications

Raphael Segabinazzi Ferreira, Jörg Nolte

Brandenburg University of Technology Cottbus-Senftenberg

Run-Time Reliability Management in Coarse-Grained Reconfigurable Architectures

Marcelo Brandalero, Michael Hübner

Brandenburg University of Technology Cottbus-Senftenberg

18:00 - 19:30 Uhr

Virtual Get Together

Zeit

8:30 - 9:30 Uhr

Keynote

Low cost solutions for increasing system reliability on multi-core based safety-critical applications

Ernesto Sanchez

Politecnico di Torino, Italy

9:30 - 10:30 Uhr

Poster Session

Zuverlässigkeitsanalyse digitaler Schaltungen durch Answer Set Programming

Anselm Breitenreiter

IHP - Leibniz-Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany

Oliver Schrape

IHP - Leibniz-Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany

Marko Andjelkovic

IHP - Leibniz-Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany

Milos Krstic

IHP - Leibniz-Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany

University of Potsdam, Germany

Assessing AFEDC Architecture's Robustness to Timing Faults

Felipe A. Kuentzer

IHP - Leibniz-Institut für innovative Mikroelektronik, Department of Computer Science, University of Potsdam

Milos Krstic

IHP - Leibniz-Institut für innovative Mikroelektronik, Department of Computer Science, University of Potsdam, Germany

Immunität eingebetteter verteilter Systeme gegen ROP-Angriffe durch Mutationen

Peter Tabatt

Hochschule Nordhausen

Mario Schölzel

Hochschule Nordhausen

Kai Lehniger

IHP - Leibniz-Institut für innovative Mikroelektronik

Mit konventioneller Technologie zum strahlungsharten AMS-Design

Oliver Schrape

IHP - Leibniz-Institut für innovative Mikroelektronik

Anselm Breitenreiter

IHP - Leibniz-Institut für innovative Mikroelektronik, Germany

Li Lu

IHP - Leibniz-Institut für innovative Mikroelektronik, Germany

Ernesto Pun Garcia

Arquimea, Madrid, Spanien

Milos Krstic

IHP - Leibniz-Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany

University of Potsdam, Germany

Toward Utilizing Self-awareness During System-level Test

Denis Schwachhofer

Institute of Software Engineering, University of Stuttgart, Germany

Institute of Computer Engineering and Computer Architecture, University of Stuttgart, Germany

Steffen Becker

Institute of Software Engineering, University of Stuttgart, Germany

Matthias Sauer

Advantest Europe, Boeblingen, Germany

Stefan Wagner

Institute of Software Engineering, University of Stuttgart, Germany

Ilia Polian

Institute of Computer Engineering and Computer Architecture, University of Stuttgart, Germany

Pause

10:45 - 11:45 Uhr

Session 4: Simulation of modern Technologies

Fault Analysis of Homogeneously and Heterogeneously Quantized Deep Neural Networks

Rizwan Tariq Syed

IHP - Leibniz-Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany

Markus Ulbricht

IHP - Leibniz-Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany

Milos Krstic

University Potsdam, Germany

IHP - Leibniz-Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany

Behavioral Simulation of Dot-Product Engine Implemented with ITIR Memristor Crossbar Including Assessment

Jianan Wen

IHP - Leibniz-Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany

Markus Ulbricht

IHP - Leibniz-Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany

Xin Fan

IHP - Leibniz-Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany

RWTH Aachen University, Aaachen, Germany

Milos Krstic

IHP - Leibniz-Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany

University of Potsdam, Germany

Pause

12:00 - 13:00 Uhr

Session 5: Codes and Security

Kürzen von BCH-Codes zur Reduzierung der Anzahl der Prüfbits

G. Duchrau

Universität Potsdam, Germany

M. Gössel

Universität Potsdam, Germany

Lightweight Packet Monitoring for Flooding DoS Attack Detection in NoC-based MPSoCs

Cesar G. Chaves

Tallinn University of Technology, Tallinn, Estonia

Frankfurt University of Applied Sciences, Frankfurt, Germany

Johanna Sepùlveda

Airbus Defence and Space, Munich, Germany

Technical University of Munich, Munich, Germany

Thomas Hollstein

Frankfurt University of Applied Sciences, Frankfurt, Germany

Tallinn University of Technology, Tallinn, Estonia

13:00 - 13:15 Uhr

Closing