Contents

Experiment: ST I_1

Topic: Circuit families

Based on measurements on digital assemblies with standard TTL and

CMOS logic gates, selected properties such as power consumption, level ranges, transmission characteristics, switching times, load factors, interference immunity and input characteristics are analysed.

Experiment: ST I_ 2

Topic: Combinatorial circuits

On the basis of a practical task for a combinatorial circuit (valve control), the circuit design, optimisation and practical test are carried out with the aim of further developing skills and abilities in combinatorics.

Experiment: ST I_ 3

Topic: Code converter

On the basis of a logical task for code implementation (detection of an actuated switch with subsequent control of a 7-segment display), the circuit design, the optimisation of the switching equations and a practical test are carried out.

Experiment: ST I_ 4

Topic: Register/logic analyser

In this test, the circuit design is carried out on the basis of a task relating to shift and memory registers. The final practical test aims to further develop skills and abilities in the design of circuit technology and in the practical handling of components and measurement technology. With regard to measurement technology, the logic analyser is introduced using the registers.

Experiment: ST I_ 5

Topic: Counter/logic analyser

The last task contains investigations into synchronous and asynchronous dual counters. Furthermore, dual up and down counters as well as BCD counters from JK flip-flops are constructed and tested according to the corresponding circuit design. With regard to measurement technology, the handling of the logic analyser is further deepened using the counters.